Lattice Semiconductor Corporation released a new Crosslink reference designs features the Lattice CrossLink FPGA for video bridging applications. The new SubLVDS to MIPI CSI-2 Image Sensor Bridge reference design will help industrial device customers with a flexible, easy-to-implement solution for connecting advanced application processors (APs) with many of the image sensors currently used in today’s machine vision applications for industrial environments. The reference design helps to remove incompatibility with the MIPI CSI-2 D-PHY interface used on today’s APs allowing the industrial device OEMs to further implement these APs in existing machine vision-capable products.
The Lattice SubLVDS to MIPI CSI-2 Image Sensor Bridge reference design will enable customers to quickly and easily create a bridging solution where an AP with a MIPI CSI-2 interface will be able to connect with a SubLVDS image sensor. The Lattice SubLVDS to MIPI CSI-2 Image Sensor Bridge reference design is free and is provided to demonstrate the use of Lattice’s popular CrossLink modular IPs, including the Pixel-to-Byte Converter, SubLVDS Image Sensor Receiver and a CSI-2/DSI D-PHY Transmitter. Along with this, the customers will also get a complete, easy to use GUI-based FPGA design and verification software environment, Diamond design software, to simplify and accelerate device development.
The key features include:
- 4, 6, 8, or 10 lane SubLVDS input to 1, 2, or 4 lane MIPI CSI-2 output
- Up to 1.2 Gbps bandwidth per input lane
- Up to 1.5 Gbps bandwidth per output lane
- Dynamic parameter setting via I2C
- Optional support for image cropping
Visit Lattice Semiconductor website for further information on the new Lattice SubLVDS to MIPI CSI-2 Image Sensor Bridge reference design.
