Diodes Incorporated has released the PI6C59xxxxx series of differential clock buffers, supports Ethernet speeds up to 400Gbit/s and are well-suited for high-performance applications such as data centers and 5G basestations. The new series will fulfil the increasing demand for network speeds operating from 25Gbit/s up to 400Gbit/s (known as the Terabit Ethernet, or TbE) with providing better signal margin while expanding the drive capability of all clock and data signals used in high-speed communications. It covers possible combinations of input and output configurations as well as a wide number of speeds and technologies.
The new PI6C59xxxxx series comes in 13 variant and incorporates mainly all of the main signaling technologies used in high-speed networking, including CML (current mode logic), LVDS (low voltage differential signaling), LVPECL (low voltage positive emitter coupled logic) and SSTL (stub series terminated logic), as well as LVCMOS. The configurations include 2, 4, 12, and 16-output for fanout buffers and data/clock buffers.
The devices of PI6C59xxxxx series will be able to increase the fanout of clock sources and improve clock and/or data distribution in communication applications operating between 1.5GHz and 6GHz covering 25G, 40G, 56G, 100G, and 400GbE, as demanded by a wide variety of applications where low jitter and fast rise/fall times are required. The ultra-low additive jitter of the devices will deliver improved jitter margins to maintain overall accuracy with around 10fs.
The devices will come in the TQFN package outline, and provide good thermal conductivity in a small footprint which is increasingly important for data center and basestation applications, where suppliers need increased power density, performance, bandwidth, and functionality.
The PI6C59xxxxx series devices are available now with pin counts from 16 to 48.
